Project Goal

The project aims to provide a diverse hardware portfolio for comprehensive technology testing. Focused on assessing the efficacy of various architectures, this initiative aims to provide valuable insights into the practical utility of emerging technologies. By subjecting a spectrum of hardware configurations to real-world applications, the project seeks to establish benchmarks that guide the adoption of the most effective and efficient technologies.

Background

The project is pivotal for CERN and broader scientific communities. By creating a diverse portfolio of applications tailored for various hardware architectures, the project aims to enhance technology evaluation. This work is crucial for optimizing computational efficiency, fostering innovation, and ensuring that CERN and the wider scientific community stay at the forefront of technological advancements, ultimately advancing our capabilities in high-performance computing and scientific research.

Progress

The project has achieved significant milestones in evaluating cutting-edge technologies across diverse CPU platforms, including Intel® Xeon®Max, AMD EPYC™, Ampere® Altra®, and NVIDIA Grace™ as well as GPUs such as Intel®Flex and NVIDIA H100. The project extensively ran benchmarks with a focus on energy consumption measurements, providing a comprehensive assessment of efficiency.

Notable example applications and benchmarks such as HEPScore23 and MadGraph were thoroughly tested. Additionally, the testbed allowed extensive software testing for the CMS, ATLAS, and LHCb experiments. The support continuously given to the user community emerged as a crucial aspect, possibly the most important, fostering collaboration, offering valuable feedback, and ensuring seamless integration of new hardware.

This progress played a pivotal role in fostering collaboration with industry partners, offering valuable feedback on technology performance and shaping future developments. The project’s outcomes are integral not only for advancing CERN experiments but also for guiding industry stakeholders in optimizing their technologies for real-world applications. The collaborative and open approach ensures seamless integration of new hardware, enhancing computational capabilities and fostering groundbreaking advancements in scientific research.

Next Steps

The project’s next steps involve ongoing evaluation of emerging technologies, crucial for readiness in the High Luminosity LHC era. Continuous assessment of advancements in x86 and ARM CPUs, as well as GPU platforms, remains a priority. This forward-looking strategy ensures that the “Heterogeneous Architectures Testbed” stays at the forefront of technological innovation to meet the computational demands of the evolving scientific landscape.

 

Project Coordinator: Luca Atzori, Maria Girone

Technical Team:Luca Atzori, Albane Carcenac, Maria Girone, Joaquim Santos, Jessy Sobreiro, David Southwick, Eric Wulff

In partnership with: E4 Computer Engineering, Simons Foundation, Intel